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  2. List of Intel codenames - Wikipedia

    en.wikipedia.org/wiki/List_of_Intel_codenames

    CPU architecture A processor microarchitecture, the successor to Nehalem. Renamed to Sandy Bridge after it was discovered that Gesher is also the name of a political party in Israel. The Hebrew word for 'bridge'. 2011 Gilgal LAN controller Intel 82564EB Ethernet PHY. Single-port, 1 Gbit/s, 150 nm. Gilgal is a place mentioned in the Hebrew Bible.

  3. Haswell (microarchitecture) - Wikipedia

    en.wikipedia.org/wiki/Haswell_(microarchitecture)

    Max. CPU clock rate. Haswell is the codename for a processor microarchitecture developed by Intel as the "fourth-generation core" successor to the Ivy Bridge (which is a die shrink / tick of the Sandy Bridge microarchitecture ). [1]

  4. Nehalem (microarchitecture) - Wikipedia

    en.wikipedia.org/wiki/Nehalem_(microarchitecture)

    Nehalem / nəˈheɪləm / [1] is the codename for Intel 's 45 nm microarchitecture released in November 2008. [2] It was used in the first generation of the Intel Core i5 and i7 processors, and succeeds the older Core microarchitecture used on Core 2 processors. [3] The term "Nehalem" comes from the Nehalem River. [4] [5]

  5. IA-64 - Wikipedia

    en.wikipedia.org/wiki/IA-64

    Intel Itanium architecture. IA-64 ( Intel Itanium architecture) is the instruction set architecture (ISA) of the discontinued Itanium family of 64-bit Intel microprocessors. The basic ISA specification originated at Hewlett-Packard (HP), and was subsequently implemented by Intel in collaboration with HP. The first Itanium processor, codenamed ...

  6. Intel Core (microarchitecture) - Wikipedia

    en.wikipedia.org/wiki/Intel_Core_(microarchitecture)

    The Intel Core microarchitecture (provisionally referred to as Next Generation Micro-architecture, and developed as Merom) is a multi-core processor microarchitecture launched by Intel in mid-2006. It is a major evolution over the Yonah , the previous iteration of the P6 microarchitecture series which started in 1995 with Pentium Pro .

  7. List of Intel CPU microarchitectures - Wikipedia

    en.wikipedia.org/wiki/List_of_Intel_CPU_micro...

    Intel's second generation of 32-bit x86 processors, introduced built-in floating point unit (FPU), 8 KB on-chip L1 cache, and pipelining. Faster per MHz than the 386. Small number of new instructions. P5 original Pentium microprocessors, first x86 processor with super-scalar architecture and branch prediction. P6

  8. Alder Lake - Wikipedia

    en.wikipedia.org/wiki/Alder_Lake

    Support status. Supported. Alder Lake is Intel's codename for the 12th generation of Intel Core processors based on a hybrid architecture utilizing Golden Cove performance cores and Gracemont efficient cores. [2] [3] It is fabricated using Intel's Intel 7 process, previously referred to as Intel 10 nm Enhanced SuperFin (10ESF).

  9. Instruction set architecture - Wikipedia

    en.wikipedia.org/wiki/Instruction_set_architecture

    t. e. In computer science, an instruction set architecture ( ISA) is an abstract model that generally defines how software controls the CPU in a computer or a family of computers. [1] A device or program that executes instructions described by that ISA, such as a central processing unit (CPU), is called an implementation of that ISA.